Reliability Study of Nano Scale Baugh Wooley Multiplier for Future Digital Signal Processing Applications

The multiplier is critical in various domains, including digital-signal-processing (DSP), graphics processing, processors, and VLSI design. Among the multipliers designed for signed arithmetic, the Baugh-Wooley multiplier (BWM) stands out due to its robustness, integration, and efficiency, rendering it particularly suitable for VLSI applications. This research investigates the performance of the BWM within the context of dynamic CMOS technology, which is characterized by high speed, low power consumption, and area efficiency. We conducted simulations of the multiplier across a range of supply voltages from 0.7 V to 1.2 V and temperatures from 27°C to 107°C. The results indicate that at 27°C, the delay falls by 52.6% with an increment in voltage, whereas at 107°C, the decline in delay is 25%. Furthermore, as the voltage increases, power consumption rises between 1% and 7% across the specified voltage range, while performance enhances, achieving a 90% improvement in the power-delay product. Additionally, short-circuit power consumption shows a reduction of up to 97%. In conclusion, the Baugh-Wooley multiplier implemented in dynamic CMOS technology exhibits superior performance and increased operational speed, making it highly promising for applications in digital signal processing, embedded systems, and VLSI implementations.