IGZO TFT Based Logic Circuits And Ring Oscillator Design in Verilog-A For Flexible Electronics

The growing demand for Thin-Film Transistors (TFTs), especially driven by the emergence of flexible electronics, emphasizes the critical need to validate the effectiveness of new thin-film materials for TFT-based circuit design. In response, this paper proposes a comprehensive behavioral model employing compact device modeling, specifically utilizing a Verilog-A Lookup Table model to design the logic circuits using IGZO TFTs. The proposed methodology enables an accurate behavioral representation of TFT behavior for IGZO and various other materials. Simulation and verification of the IGZO TFT circuits were carried out in Pathwave ADS, demonstrating the model's potency in evaluating the performance across a spectrum of digital circuits. In this work, a design of experiment (DOE) simulation has been performed to evaluate the optimal size of the inverter to achieve the high load driving capability of a maximum load of 50uF and lower power-delay product (PDP) of 23.326 pJ. In particular, the optimized inverter was used to design a stable 31-stage ring oscillator. The oscillation frequency range lies between 416.667KHz to 28.49KHz from 3 stages to 31 stages respectively. Overall, this research presents a practical and efficient approach to validate new thin film materials-based circuit design within a minimum time frame and design cycle.