Comparative Analysis of Dual Metal Gate-Split Source and Bilateral Tunnel Field Effect Transistor

This work introduces a novel Dual Metal Gate-Split Source-Bilateral Tunnel Field-Effect Transistor (DMG-SS-BTFET) designed for ultra-low-power applications. The split-source architecture, integrated with dual-metal gates, enhances the tunneling efficiency and ensures superior electrostatic control over the channel. The proposed DMG-SS-BTFET exhibits significant improvements in I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>, I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf>, SS, and the I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>/I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf> ratio compared to conventional TFETs. Its performance is evaluated by comparing the split-source design with a bilateral architecture (DMG-BTFET). Additionally, an RF analysis at a 1 GHz frequency highlights its suitability for high-speed operations. These features position the DMG-SS-BTFET as an advanced candidate for future applications.

Authors

Institutions

Publication Details

Published
2025-04-05
DOI
https://doi.org/10.1109/devic63749.2025.11012210
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Comparative Analysis of Dual Metal Gate-Split Source and Bilateral Tunnel Field Effect Transistor

Rahul Goel, Madhulika Verma, Mohammad Hamza, Sachin Agrawal
Advancements in Semiconductor Devices and Circuit Design
article

Comparative Analysis of Dual Metal Gate-Split Source and Bilateral Tunnel Field Effect Transistor

Rahul Goel, Madhulika Verma, Mohammad Hamza, Sachin Agrawal
article en

Abstract

This work introduces a novel Dual Metal Gate-Split Source-Bilateral Tunnel Field-Effect Transistor (DMG-SS-BTFET) designed for ultra-low-power applications. The split-source architecture, integrated with dual-metal gates, enhances the tunneling efficiency and ensures superior electrostatic control over the channel. The proposed DMG-SS-BTFET exhibits significant improvements in I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>, I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf>, SS, and the I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>/I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf> ratio compared to conventional TFETs. Its performance is evaluated by comparing the split-source design with a bilateral architecture (DMG-BTFET). Additionally, an RF analysis at a 1 GHz frequency highlights its suitability for high-speed operations. These features position the DMG-SS-BTFET as an advanced candidate for future applications.

National Institute of Technology Delhi (IN)
Openalex Percentile: Top 90%
Advancements in Semiconductor Devices and Circuit Design
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.