FPGA Implementation of Area-Time Efficient Modular Inversion over NIST Prime Fields

Elliptic Curve Cryptography (ECC) ensures robust security with significantly reduced cryptographic key sizes, making it well-suited for devices with limited resources. Modular inversion, one of the fundamental arithmetic operation in ECC, can significantly impact performance. Our proposed implementation incorporates efficient modular inversion algorithms, pipelining, and parallel processing techniques using VHDL to maximize throughput and minimize latency. Through rigorous performance evaluation, we demonstrate substantial improvements in both speed and energy efficiency, making our solution well-suited for a wide range of cryptographic applications. By utilizing the Binary Inversion Algorithm with algorithmic reformulations and architectural optimizations, the design achieves 184.771 MHz and utilizes 4414 LUTs on Virtex-7 FPGA platform and 118.938 MHz and 5234 LUTs utilization on Virtex-5 FPGA platform which are the fastest known hardware implementation using the lowest possible resource consumption of 256-bit modular inversion for ECC on FPGAs. These architectures are also immune to Simple Power Analysis (SPA) attacks. Performance analysis highlights its advantages in speed and resource efficiency, making it a valuable advancement in cryptographic hardware design.

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Published
2025-02-13
DOI
https://doi.org/10.1109/ecce64574.2025.11013344
Citations
1
Primary Topic
Numerical Methods and Algorithms
Type
article
Field-Weighted Citation Impact
1.50
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FPGA Implementation of Area-Time Efficient Modular Inversion over NIST Prime Fields

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article

FPGA Implementation of Area-Time Efficient Modular Inversion over NIST Prime Fields

Fatheha Khatun, Sadia Sultana, Md. Sazedur Rahman, Ibnul Zarrah, Aziza Nusrat
article en
1 citations

Abstract

Elliptic Curve Cryptography (ECC) ensures robust security with significantly reduced cryptographic key sizes, making it well-suited for devices with limited resources. Modular inversion, one of the fundamental arithmetic operation in ECC, can significantly impact performance. Our proposed implementation incorporates efficient modular inversion algorithms, pipelining, and parallel processing techniques using VHDL to maximize throughput and minimize latency. Through rigorous performance evaluation, we demonstrate substantial improvements in both speed and energy efficiency, making our solution well-suited for a wide range of cryptographic applications. By utilizing the Binary Inversion Algorithm with algorithmic reformulations and architectural optimizations, the design achieves 184.771 MHz and utilizes 4414 LUTs on Virtex-7 FPGA platform and 118.938 MHz and 5234 LUTs utilization on Virtex-5 FPGA platform which are the fastest known hardware implementation using the lowest possible resource consumption of 256-bit modular inversion for ECC on FPGAs. These architectures are also immune to Simple Power Analysis (SPA) attacks. Performance analysis highlights its advantages in speed and resource efficiency, making it a valuable advancement in cryptographic hardware design.

Hajee Mohammad Danesh Science and Technology University (BD)
Openalex Percentile: Top 16%
Numerical Methods and Algorithms
1.50
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