Efficient Error Detection and Correction code based on Improved Redundant Matrix Code (IRMC) Algorithm
Mobile way communication over the Internet requires error detection and correction. The detection of error at the data link layer can be controlled by network handling techniques. Data traffic, signaling and control will be carried out by two channels of network connection. Error detection will be done for traffic channels of the information bits, encoded correction code together forms the transmitted data stream. Currently, the error is tolerated by the SRAM memory frame, so Single Cell Upsets (SCU) or Multiple Cell Upsets (MCU) can occur. One of the main reasons for the MCU is astronomical radiation. The proposed technique is called Improved Redundant Matrix Code (IRMC) to protect memories from the detuning of many components, is used to detect and troubleshoot storage devices. IRMC's detection rate and adjustments contrast with other rescue codes. Space, power, and defer overhead is only. Results should prove that IRMC has higher quality and higher correctability for MCU tuned for the lower power and delay. Xlinx 14.7 is the tool used for the process and using Verilog HDL, programming of the algorithm is performed.
Authors
- G. Shanthi
- Sk. Shoukath Vali
- K. Srinivas Rao
- K L V Ramana Kumari (ORCID: https://orcid.org/0000-0002-1621-0489)
- Uppala Bhargava Sai
- S. Leela
Publication Details
- Published
- 2025-04-05
- DOI
- https://doi.org/10.1109/devic63749.2025.11012615
- Citations
- 1
- Primary Topic
- Embedded Systems and FPGA Applications
- Type
- article
- Field-Weighted Citation Impact
- 0.73