Design of a Medium-Voltage Low-Power Low-Dropout Linear Regulator
This study presents a low-power low dropout linear regulator (LDO) design methodology for medium voltage applications. The design method is particularly targeted at the power management requirements in the medium-voltage range. By optimizing the tuned tube structure, selecting a low-power and high-gain error amplifier, implementing an efficient switching control strategy, and constructing an accurate feedback network, the design method achieves an effective reduction of the static and dynamic power consumption of the LDO under the premise of ensuring the stability of the output voltage. Experimental results show that the designed LDO exhibits excellent power consumption, output voltage stability and environmental adaptability in medium-voltage applications, and is suitable for power management requirements in portable electronic devices, precision instruments and IoT sensor nodes.
Authors
- Jinzhao Li (ORCID: https://orcid.org/0000-0001-6866-1321)
- Peiyong Zhang (ORCID: https://orcid.org/0000-0002-7627-2470)
- Qiaofang Chen
- Hongwei Shen (ORCID: https://orcid.org/0000-0001-5060-7116)
- Liguo Wen
Institutions
- Beijing Microelectronics Technology Institute (CN)
- Zhejiang University (CN)
Publication Details
- Published
- 2024-12-06
- DOI
- https://doi.org/10.1109/cespe64643.2024.00033
- Primary Topic
- Parallel Computing and Optimization Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00