Space-Filling Latin Hypercube Design for Efficient Bayesian Optimization With Application to Semiconductor Development

In this study, we present an initial experimental design for Bayesian optimization (BO) applied to the semiconductor process development. For efficient BO, it can be effective to draw initial sampling nodes that cover the search space as uniformly as possible. In particular, in process optimization, it is necessary to appropriately place the sampling nodes within the high-dimensional search space consisting of multiple process parameters. To address this issue, we propose a space-filling Latin hypercube design (LHD) with a small fill distance and a large separation radius based on simulated annealing. Compared with Maximin LHD and Sobol’ design, the proposed design exhibits the smallest fill distance and a large separation radius, which is equivalent to that of Maximin LHD. Through an example focused on optimizing high aspect ratio hole etching, we demonstrate that the proposed design effectively reduces the number of experiments required for the convergence of BO compared to conventional designs. Additionally, it can be applied to various processes such as chemical vapor deposition, atomic layer deposition and wet etching, among others.

Authors

Institutions

Publication Details

Journal
IEEE Transactions on Semiconductor Manufacturing
Published
2025-05-29
DOI
https://doi.org/10.1109/tsm.2025.3574791
Citations
1
Primary Topic
Radiation Effects in Electronics
Type
article
Field-Weighted Citation Impact
0.73
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Space-Filling Latin Hypercube Design for Efficient Bayesian Optimization With Application to Semiconductor Development

Takuya Watanabe, Shin Nishio, Naoki Sakai, Takashi Goda et al.
1 citations
IEEE Transactions on Semiconductor Manufacturing
Radiation Effects in Electronics
0.73
article

Space-Filling Latin Hypercube Design for Efficient Bayesian Optimization With Application to Semiconductor Development

Takuya Watanabe, Shin Nishio, Naoki Sakai, Takashi Goda, Yuta Inoue, Shigeru Kinoshita, Kayo Ikeda, Atsushi Teruya
article en
1 citations

Abstract

In this study, we present an initial experimental design for Bayesian optimization (BO) applied to the semiconductor process development. For efficient BO, it can be effective to draw initial sampling nodes that cover the search space as uniformly as possible. In particular, in process optimization, it is necessary to appropriately place the sampling nodes within the high-dimensional search space consisting of multiple process parameters. To address this issue, we propose a space-filling Latin hypercube design (LHD) with a small fill distance and a large separation radius based on simulated annealing. Compared with Maximin LHD and Sobol’ design, the proposed design exhibits the smallest fill distance and a large separation radius, which is equivalent to that of Maximin LHD. Through an example focused on optimizing high aspect ratio hole etching, we demonstrate that the proposed design effectively reduces the number of experiments required for the convergence of BO compared to conventional designs. Additionally, it can be applied to various processes such as chemical vapor deposition, atomic layer deposition and wet etching, among others.

IEEE Transactions on Semiconductor ManufacturingVol. 38(3)
Yokkaichi University (JP), Bunkyo University (JP), The University of Tokyo (JP)
Industry, innovation and infrastructure
Openalex Percentile: Top 28%
Radiation Effects in Electronics
0.73
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.