A High-Throughput Implementation of the MUSIC Algorithm Using AMD Versal AI Engine

The MUSIC (Multiple Signal Classification) algorithm is a well-established method for Direction of Arrival (DOA) estimation in array signal processing. Its ability to accurately resolve multiple signals arriving from different directions, even when they are closely spaced, makes it indispensable in applications requiring high-precision DOA estimation, such as radar, sonar, and wireless communications. Hardware-based implementations of the MUSIC algorithm have proven to be highly valuable and have attracted significant research interests. The Versal platform represents the latest generation of AMD's FPGA offerings, with the AI Engine emerging as a disruptive innovation due to its massive computational power. The AI Engine is designed to efficiently handle complex computations and features a 2D array of SIMD (Single Instruction, Multiple Data) and VLIW (Very Long Instruction Word) vector processors, also known as compute tiles. The data processing chain of the MUSIC algorithm consists of several functional blocks: QR Decomposition (QRD), Singular Value Decomposition (SVD), Spectrum Calculation, and DOA Identification. The incoming data to the MUSIC processing chain are organized into batches of snapshots. Each batch is represented as an <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$M$</tex> × <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$N$</tex> matrix, where <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$M$</tex> denotes the number of snapshots and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$N$</tex> the number of ULA (Uniform Linear Array) elements. All data within these matrices are stored in complex single-precision floating-point format. For our implementation, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$M$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$N$</tex> are set to 128 and 8 respectively. To fully harness the SIMD/VLIW capabilities of the AI Engine and take advantage of its up to 400 compute tiles, we deploy a deep pipelined architecture that maximizes the throughput of the MUSIC algorithm. This architecture breaks down complex operations into smaller, sequential stages, distributing the workload of DOA estimation across multiple stages. Each pipeline stage is responsible for a specific part of the computation, enabling concurrent processing of multiple data elements in parallel. Additionally, loops in QRD and SVD operations are unrolled and distributed across multiple tiles for parallelism. The AI Engine can be conceptualized as a 2D array of vector processors. To leverage its SIMD/VLIW capabilities, we utilize the data type aie:: vector < cfloat, 8 > as the standard for all operations. This allows for 8-lane SIMD operations on complex numbers in single-precision floats, ensuring both consistency and alignment with the AI Engine's vectorized processing power. To evaluate the throughput performance of our MUSIC implementation, a hardware-in-the-loop setup was deployed. This setup involved a system where a laptop running a MATLAB system model generated batches of snapshot data and sent them to an AMD Versal AI Core Series VCK190 Evaluation Kit [1]. These snapshot data were stored in the VCK190's DDR4 memory and transferred to the AI Engine via DMA. Once received, the AI Engine processed the snapshot data in 128 × 8 matrices using the MUSIC algorithm and produced up to 7 DOA estimates within each batch. These DOA estimates were then written back to the DDR4 memory for further analysis and visualization. After processing all snapshots in a batch, the AI Engine's average processing time was measured using profiling counters. This demonstrated a sustained throughput rate of 1μs per batch of 128 samples for an 8-element ULA. In our implementation, 157 out of the total 400 tiles on the AMD Versal VC1902 device mounted on VCK190 were utilized. In this paper, we presented a high-throughput implementation of the MUSIC algorithm powered by the AMD Versal AI Engine. Our implementation successfully estimated up to 7 directions of signal arrivals simultaneously, achieving a sustained throughput rate of 1μs per batch of 128 snapshots for an 8-element ULA. This result signifies the immense potential of combining advanced signal processing algorithms with state-of-the-art hardware to deliver unprecedented performance in real-time signal processing applications. Our solution has been published with the complete source code available from the AMD GitHub website [2].

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Published
2025-05-04
DOI
https://doi.org/10.1109/fccm62733.2025.00051
Primary Topic
Direction-of-Arrival Estimation Techniques
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article

A High-Throughput Implementation of the MUSIC Algorithm Using AMD Versal AI Engine

B. Berkane, M. Rollins, Peifang Zhou, Vlad Druz
Direction-of-Arrival Estimation Techniques
article

A High-Throughput Implementation of the MUSIC Algorithm Using AMD Versal AI Engine

B. Berkane, M. Rollins, Peifang Zhou, Vlad Druz
article en

Abstract

The MUSIC (Multiple Signal Classification) algorithm is a well-established method for Direction of Arrival (DOA) estimation in array signal processing. Its ability to accurately resolve multiple signals arriving from different directions, even when they are closely spaced, makes it indispensable in applications requiring high-precision DOA estimation, such as radar, sonar, and wireless communications. Hardware-based implementations of the MUSIC algorithm have proven to be highly valuable and have attracted significant research interests. The Versal platform represents the latest generation of AMD's FPGA offerings, with the AI Engine emerging as a disruptive innovation due to its massive computational power. The AI Engine is designed to efficiently handle complex computations and features a 2D array of SIMD (Single Instruction, Multiple Data) and VLIW (Very Long Instruction Word) vector processors, also known as compute tiles. The data processing chain of the MUSIC algorithm consists of several functional blocks: QR Decomposition (QRD), Singular Value Decomposition (SVD), Spectrum Calculation, and DOA Identification. The incoming data to the MUSIC processing chain are organized into batches of snapshots. Each batch is represented as an <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$M$</tex> × <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$N$</tex> matrix, where <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$M$</tex> denotes the number of snapshots and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$N$</tex> the number of ULA (Uniform Linear Array) elements. All data within these matrices are stored in complex single-precision floating-point format. For our implementation, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$M$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$N$</tex> are set to 128 and 8 respectively. To fully harness the SIMD/VLIW capabilities of the AI Engine and take advantage of its up to 400 compute tiles, we deploy a deep pipelined architecture that maximizes the throughput of the MUSIC algorithm. This architecture breaks down complex operations into smaller, sequential stages, distributing the workload of DOA estimation across multiple stages. Each pipeline stage is responsible for a specific part of the computation, enabling concurrent processing of multiple data elements in parallel. Additionally, loops in QRD and SVD operations are unrolled and distributed across multiple tiles for parallelism. The AI Engine can be conceptualized as a 2D array of vector processors. To leverage its SIMD/VLIW capabilities, we utilize the data type aie:: vector < cfloat, 8 > as the standard for all operations. This allows for 8-lane SIMD operations on complex numbers in single-precision floats, ensuring both consistency and alignment with the AI Engine's vectorized processing power. To evaluate the throughput performance of our MUSIC implementation, a hardware-in-the-loop setup was deployed. This setup involved a system where a laptop running a MATLAB system model generated batches of snapshot data and sent them to an AMD Versal AI Core Series VCK190 Evaluation Kit [1]. These snapshot data were stored in the VCK190's DDR4 memory and transferred to the AI Engine via DMA. Once received, the AI Engine processed the snapshot data in 128 × 8 matrices using the MUSIC algorithm and produced up to 7 DOA estimates within each batch. These DOA estimates were then written back to the DDR4 memory for further analysis and visualization. After processing all snapshots in a batch, the AI Engine's average processing time was measured using profiling counters. This demonstrated a sustained throughput rate of 1μs per batch of 128 samples for an 8-element ULA. In our implementation, 157 out of the total 400 tiles on the AMD Versal VC1902 device mounted on VCK190 were utilized. In this paper, we presented a high-throughput implementation of the MUSIC algorithm powered by the AMD Versal AI Engine. Our implementation successfully estimated up to 7 directions of signal arrivals simultaneously, achieving a sustained throughput rate of 1μs per batch of 128 snapshots for an 8-element ULA. This result signifies the immense potential of combining advanced signal processing algorithms with state-of-the-art hardware to deliver unprecedented performance in real-time signal processing applications. Our solution has been published with the complete source code available from the AMD GitHub website [2].

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