Performance Modeling and Comparisons of an FPGA-based Direct Simulation Monte Carlo Solver
We present an FPGA-based DSMC solver using a novel spatially-parallel collision evaluation algorithm, eliminating race conditions common in conventional DSMC methods. Our solver maintains high accuracy and achieves speedups of up to 5.5× over CPU and 1.5× over GPU implementations in low particle counts, particularly benefiting microscale flow scenarios requiring numerous repeated simulations.
Authors
- Sean O’Byrne (ORCID: https://orcid.org/0000-0002-4237-2545)
- Edwin G. W. Peters (ORCID: https://orcid.org/0000-0003-3766-8576)
- David John Petty
- Saleen Bhattarai
Institutions
- University of Canberra (AU)
- UNSW Sydney (AU)
- UNSW Canberra
Publication Details
- Published
- 2025-05-04
- DOI
- https://doi.org/10.1109/fccm62733.2025.00073
- Primary Topic
- Parallel Computing and Optimization Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00