iSEW: in-Sensor Embedded Watermarking for Secure Imaging
This paper proposes an analog-domain watermarking approach implemented directly in CMOS sensors. By embedding the watermark at the readout stage before ADC, we achieve a robust, tamper-resistant mechanism with minimal impact on image quality. Modifications to the column amplifier architecture and a secure pattern generator enable effective watermark embedding. Experimental results on a 64×64 pixel array showcase high watermark detection rates (> 85%) under various attacks.
Authors
- Sepehr Tabrizchi (ORCID: https://orcid.org/0000-0001-5105-3450)
- Shaahin Angizi (ORCID: https://orcid.org/0000-0003-2289-6381)
- Arman Roohi (ORCID: https://orcid.org/0000-0002-0900-8768)
Institutions
- New Jersey Institute of Technology (US)
- University of Illinois Chicago (US)
Publication Details
- Published
- 2025-05-04
- DOI
- https://doi.org/10.1109/fccm62733.2025.00076
- Primary Topic
- Advanced Steganography and Watermarking Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Science Foundation