Low-Latency FFT/iFFT RTL Implementation for the FALCON Post-Quantum Signature Algorithm

FALCON is one of the three post-quantum digital signature schemes that have been recently standardized by NIST due to the future threat that quantum computers pose to classical cryptographic schemes. Despite this, there is currently no full hardware register-transfer level (RTL) implementation of FALCON. One possible explanation is the rather unusual requirement for a double-precision floating-point Fast Fourier Transform (FFT), which is used in FALCON to speed up polynomial multiplication. In this article, we describe a full RTL implementation of the FFT and its inverse, on FPGA, tailored for the specific context of FALCON. Fitting in this specific cryptographic context, the implementation is also constant-time. The proposed hardware implementation achieves the best latency of the literature. This work paves the way for the first complete fine-tuned RTL implementation of FALCON as well as the security evaluation of such implementations against physical attacks.