Ph.D. Project: An Efficient NTT Accelerator Supporting Various Lengths for HHE
Hybrid Homomorphic Encryption (HHE) scheme integrates arithmetic FHE and logical FHE to enhance the performance and scalability of privacy-preserving computations. However, the performance of hybrid homomorphic encryption mainly depends on the efficiency of the Number Theoretic Transform (NTT). Consequently, this paper introduces an FPGA-based NTT accelerator for HHE. We have designed a cross-scheme-friendly NTT architecture that supports NTT of varying lengths through the reuse of NTT units. Experimental results demonstrate that proposed architecture achieves a 3.4 times increase in throughput compared to existing state-of-the-art approaches across a range of NTT lengths.
Authors
- Teng Wang (ORCID: https://orcid.org/0000-0002-7281-1203)
- Hang Gu
- Chao Wang
Institutions
- University of Science and Technology of China (CN)
Publication Details
- Published
- 2025-05-04
- DOI
- https://doi.org/10.1109/fccm62733.2025.00018
- Primary Topic
- Gyrotron and Vacuum Electronics Research
- Type
- article
- Field-Weighted Citation Impact
- 0.00