A Radiation-Hard 8-Channel 15-Bit 40-MSPS ADC for the ATLAS Liquid Argon Calorimeter Readout

The custom design of a radiation-hardened, 8-channel, 40-MSPS, 15-bit resolution, 14.2-bit dynamic range, 11.4-ENOB ADC data acquisition ASIC fabricated in a commercial 65 nm triple-well CMOS technology is presented. The ADC is developed for and integrates seamlessly into the readout system for the ATLAS liquid argon (LAr) calorimeter in the High-Luminosity Large Hadron Collider (HL-LHC) upgrade at CERN, which will require a total of 364,936 ADC channels. A three-stage MDAC+SAR pipelined ADC architecture was designed to meet the physics requirements and scientific goals of the ATLAS experiment. The ADC is a fully self-contained data acquisition system that includes foreground calibration, digital data processing, digital control, and supporting circuitry. The measured performance shows the ADC achieves a competitive dynamic range and SNDR, and it meets or exceeds the ATLAS analog requirements. Radiation tolerance and scalability design considerations were implemented at the device-, circuit-, and system-level. Radiation-hardening-by-design techniques used include redundancy for digital circuits, use of MiM capacitors, and a hybrid RC-DAC for the ADC core. The ADC ASIC was demonstrated to be robust against the effects of the intense radiation expected in the HL-LHC experimental environment.

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Publication Details

Journal
IEEE Open Journal of the Solid-State Circuits Society
Published
2025-01-01
DOI
https://doi.org/10.1109/ojsscs.2025.3573904
Primary Topic
Particle Detector Development and Performance
Type
article
Field-Weighted Citation Impact
0.00

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article

A Radiation-Hard 8-Channel 15-Bit 40-MSPS ADC for the ATLAS Liquid Argon Calorimeter Readout

Subhajit Ray, Alan Kahn, J. Bán, Michael Unanian et al.
IEEE Open Journal of the Solid-State Circuits Society
Particle Detector Development and Performance
article

A Radiation-Hard 8-Channel 15-Bit 40-MSPS ADC for the ATLAS Liquid Argon Calorimeter Readout

Subhajit Ray, Alan Kahn, J. Bán, Michael Unanian, Peter R. Kinget, Lauren Larson, Xiangxing Yang, Chen-Kai Hsu, K. E. Kennedy, J. L. Gonski, Rui Xu, J. A. Parsons, Michael Himmelsbach, Nan Sun, Sarthak Kalani, T. Andeen, D. K. Panchal, D. M. Williams, Brian Kirby, Gabriel Matos, M. Contreras Cossio, Andrew Caldon Smith
article en

Abstract

The custom design of a radiation-hardened, 8-channel, 40-MSPS, 15-bit resolution, 14.2-bit dynamic range, 11.4-ENOB ADC data acquisition ASIC fabricated in a commercial 65 nm triple-well CMOS technology is presented. The ADC is developed for and integrates seamlessly into the readout system for the ATLAS liquid argon (LAr) calorimeter in the High-Luminosity Large Hadron Collider (HL-LHC) upgrade at CERN, which will require a total of 364,936 ADC channels. A three-stage MDAC+SAR pipelined ADC architecture was designed to meet the physics requirements and scientific goals of the ATLAS experiment. The ADC is a fully self-contained data acquisition system that includes foreground calibration, digital data processing, digital control, and supporting circuitry. The measured performance shows the ADC achieves a competitive dynamic range and SNDR, and it meets or exceeds the ATLAS analog requirements. Radiation tolerance and scalability design considerations were implemented at the device-, circuit-, and system-level. Radiation-hardening-by-design techniques used include redundancy for digital circuits, use of MiM capacitors, and a hybrid RC-DAC for the ADC core. The ADC ASIC was demonstrated to be robust against the effects of the intense radiation expected in the HL-LHC experimental environment.

IEEE Open Journal of the Solid-State Circuits SocietyVol. 5
Columbia University (US), The University of Texas at Austin (US)
National Science Foundation, U.S. Department of Energy
Affordable and clean energy
Openalex Percentile: Top 94%
Particle Detector Development and Performance
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