RAM, DEMUX and ALU in nanoscale: a quantum-dot cellular automata-based architecture

Quantum-dot cellular automata (QCA) is incipient as a groundbreaking substitution to conventional CMOS archetype for nanoscale logic circuit design. Unlike transistor-based approaches, QCA uses cell polarization to achieve high-density, low-power digital circuits at the nanoscale levels. This innovative framework extends substantial features in extent efficacy and energy consumption, particularly for critical components such as RAM or Random Access Memory and logic circuits. QCA nanoscale-based RAM provides compact, energy-efficient data storage, while QCA demultiplexers (DeMuX) enable precise data routing that are essential for integrated communication in digital systems. Arithmetic logic unit (ALU) built on QCA are fundamental for executing both logical and arithmetic operations. However, traditional QCA implementations of RAM, DeMuX, and ALUs often suffer from excessive cell usage, larger area footprints, and increased latency. Balancing trade-offs between size, power, and synchronization remains a design challenge. In this study, new compact and cost-efficient RAM and DeMuX circuits have been proposed and designed for optimal performance. These designs reduce cell count, area, and clock delay significantly. Furthermore, a high-performance ALU is developed based on these components. Simulations using QCADesigner 2.0.3 and Hamming distance analysis confirm superior performance and energy efficiency, reinforcing QCA’s promise for next-generation digital circuits.