From Variations to Precision: Modeling and Optimization of Inner Spacer Etch in GAA FETs
This work introduces a robust machine learning framework for modeling and optimizing the inner spacer etch process in gate-all-around FET fabrication. Using an in-house Particle Monte-Carlo simulator, the etch process is modeled precisely across varied conditions. Gaussian Process Regression outperforms neural network models, achieving 98-99% accuracy in predicting etch front variations. Bayesian Optimization with adaptive sampling and successive domain reduction is utilized to fine-tune etch parameters, minimizing the error between predicted and target etch fronts. This integrated approach enables precise control over spacer-channel geometry, making this approach highly effective for advanced semiconductor manufacturing.
Authors
- Samit Barai
- Pardeep Kumar (ORCID: https://orcid.org/0000-0002-4643-7756)
- Om Maheshwari (ORCID: https://orcid.org/0000-0001-5362-3963)
- Nihar R. Mohapatra (ORCID: https://orcid.org/0000-0002-8827-5417)
Institutions
- Indian Institute of Technology Gandhinagar (IN)
Publication Details
- Published
- 2025-05-05
- DOI
- https://doi.org/10.1109/asmc64512.2025.11010557
- Citations
- 2
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 1.46
Funders
- Ministry of Education