Research on FPGA-Based Functional Safety Diagnosis System

The deployment of SRAM-based Field Programmable Gate Arrays (FPGAs) in robotic automation has increased significantly. In this paper, a functional safety diagnosis system based on FPGA is proposed in accordance with the IEC61508 functional safety standard. The system analyzes safety objectives and potential failure modes. It employs a Soft Error Mitigation (SEM) IP core for real-time monitoring and error correction of the Configuration RAM (CRAM). Additionally, Error Correction Code (ECC) technology is used to perform error injection testing on Block RAM (BRAM), while read/write test algorithms are utilized to diagnose potential functional failures in memory arrays. The system integrates the XADC module for real-time monitoring and threshold detection of external input voltages, ensuring the stability of the power supply. Furthermore, a watchdog timer and logical sequence execution monitoring are designed to supervise the operation of the entire self-diagnosis system, preventing the system from entering a deadlock or remaining unresponsive for an extended period. The proposed system not only diagnoses internal FPGA functional modules but also ensures the safety of the diagnostic system itself through the watchdog mechanism. This paper aims to enhance the diagnostic coverage of controller systems, ensuring the system meets the required diagnostic coverage range within Safety Integrity Level (SIL) standards.