Si -Photonics Waveguide Propagation Loss Improvement Through Process Optimization

In silicon photonics devices, waveguides (WG) with lower propagation loss are always preferred due to their efficiency and performance benefits. One of the primary factors contributing to the overall propagation loss in waveguides is the light scattering caused by the roughness of the waveguide sidewalls. This paper presents an evaluation of various lithography and etch process optimizations aimed at reducing sidewall roughness on a 200mm CMOS-compatible photonics platform. Through these optimizations, we have identified that a significant improvement in waveguide propagation can be achieved by optimizing the lithography Post Exposure Bake (PEB) process. This optimization effectively minimizes sidewall roughness, thereby enhancing the overall performance of the waveguides.