Cryogenic Plasma Etching Process Optimization Using a Wireless CryoTemp™ Metrology Wafer
To enhance the etch profile fidelity in advanced 3D flash memory, a cryogenic plasma etching process is employed for the channel hole etch layer. Controlling wafer level temperature and cross-wafer uniformity is crucial in this process. KLA’s newly developed, next generation CryoTemp metrology wafer temperature measurement system offers an in-situ metrology solution for optimizing and controlling the cryogenic plasma etching process. This work demonstrates how the new CryoTemp wafer optimizes the cryogenic plasma etching process for a Lam Research etch tool in 3D flash memory manufacturing. The results show that the CryoTemp wafer is sensitive to RF power and backside helium (He) flow rate, and that temperature correlates well with channel hole etch depth. KLA’s new CryoTemp wafer helps to characterize and stabilize the cryogenic etch process, improving the yield for advanced 3D devices.
Authors
- Phillip K.C. Tse
- Xiafang Zhang
- Akriti Akriti
- Hironori MATSUOKA
- A. Shenai
- Qing Xu
Institutions
- Lam Research (United States) (US)
- KLA (United States) (US)
Publication Details
- Published
- 2025-05-05
- DOI
- https://doi.org/10.1109/asmc64512.2025.11010587
- Primary Topic
- Silicon and Solar Cell Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00