A Physics-Assisted Deep Reinforcement Learning Methodology for Signal and Power Integrity Optimization of Large-Scale TSV Arrays

The signal integrity (SI) and power integrity (PI) optimization of through-silicon via (TSV) arrays in high-bandwidth memory (HBM) is crucial for enhancing system reliability. However, previous studies mostly focused on individual SI or PI optimization, and have not achieved SI/PI optimization with excellent convergence. Based on the physical mechanisms for the SI/PI optimization of TSV arrays, this article proposes a novel physics-assisted deep reinforcement learning (DRL) methodology. A divide-and-conquer strategy is developed to handle large-scale TSV arrays. The physical mechanisms are utilized to design the details of the DRL methodology, thereby unifying different optimization scenarios (SI optimization, PI optimization, and SI/PI co-optimization) into a single process, where designers can customize the optimization objectives based on the design requirements. The results show our methodology achieves excellent convergence and finds the final solutions with lower crosstalk and lower power noises than the state-of-the-art DRL approach across various optimization scenarios.