eFUSE and IDDQ Process Window Enhancement Through CoSi RTA Optimization

eFUSE technology has become integral in consumer and automotive applications, where electromigration of silicide is used to transition from a low to a high resistance state. The integration of a cobalt silicide (CoSi<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>) process module is critical for ensuring process robustness and wafer yield. While a thicker cobalt silicide layer is preferred for maintaining low and stable pre-programming resistance, it poses a risk of increased junction leakage, subsequently degrading IDDQ leakage performance. Among the critical process variables, cobalt thickness, Rapid thermal annealing-1 (RTA1), and HF pre-clean processes are frequently optimized by process engineers to improve the process robustness and process margin. This paper discusses the optimization of the CoSi<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> RTA2 temperature to improve eFUSE performance without compromising the IDDQ leakage or sheet resistance requirements. The improved process window and robustness eliminate both eFUSE and IDDQ-related yield loss, ensuring reliability in various applications.