Optimization Epitaxy Process to Reduce Hotspot Problem

Silicon epitaxy is critical for customizing film resistivity and enhancing breakdown voltage in advanced automotive devices. However, process-induced wafer non-uniformity can lead to downstream lithography defocus and hotspots. In this paper, we demonstrate two methods to mitigate the problem: inserting a silicon oxide capping layer to suppress parasitic growth at wafer edge; optimizing epitaxial temperature from 1080 °C to 1000 °C to improve film uniformity. The combined approach eliminates wafer edge roll-up profile, establishes a globally flat wafer surface and achieves a 95% reduction of lithography hotspots.