Modeling of Multiport DC‐DC Converter With Improved Fault‐Tolerant Capability and Minimized Current Ripple Considering Circuit Parasitic

ABSTRACT Multiport DC‐DC converters have the capability to provide the output power at different voltage levels simultaneously. In this paper, a novel boost‐side interleaved switched boost (BSISB) multiport DC‐DC converter is proposed. The boost‐side interleaving (BSI) reduces the input current ripple and improves fault‐tolerant capability at the load end, even after an open‐circuit transistor failure. The switched‐boost action topology uses time‐multiplexing control of boost and buck switches for independently regulated voltage of both the output ports using reduced semiconductor device count. The state‐space averaged (SSA) and small signal model (SSM) of the proposed converter is developed with circuit parasitic. The SSA and SSM are used for steady‐state gain analysis and the controller design for the converter, respectively. A prototype is developed in the lab to test the proposed converter under constant‐current constant‐voltage (CC‐CV) mode of charging of the battery and verify the derived analytical results.