Efficient off-chip configuration method for scalable programmable photonic integrated circuits

Programmable photonic integrated circuits can realize analog matrix multiplication to accelerate computing disruptively in various fields. However, a major challenge is the precise voltage configuration of the circuit to deal with the universal static error derived from manufacturing. Here, we propose a complete off-chip method based on the combination of gradient descent and genetic algorithms to find the optimal configuration for an arbitrary matrix, enabling imperfect circuits to achieve excellent performance. In the simulation, we demonstrated that our method implements an arbitrary matrix with an average fidelity of 0.992 on a Mach–Zehnder-interferometer-based circuit with up to 28 input ports. Experimentally, we demonstrated superior performance on the circuit with 4 input ports, including training a theoretical model that characterized the experimental imperfections of the fabricated chip and obtaining the optimal configuration for permutation matrices with near-one fidelity and for 100 unitary matrices with a 0.985 average fidelity. Programmable photonic integrated circuits (PPICs) promise transformative advances in computing, yet precise voltage configuration remains a challenge due to manufacturing-induced static errors. Here, the authors introduce an off-chip method combining gradient descent and genetic algorithms to optimize circuit configurations, achieving high fidelity in matrix implementations and enhancing PPIC performance across various applications.