Real-Time Detection and Correction of Signal-Based Attacks in Cyber-Physical Systems

Cyber-Physical Systems (CPS) are vital to modern infrastructure but remain vulnerable to signal-based attacks that threaten their reliability and safety. This work proposes a practical security framework combining Verilog simulations and Python-based analysis to detect and correct False Data Injection (FDI) attacks in real time. The system integrates anomaly detection, classification, and, correction using predefined logic and Machine Learning (ML) inference. Experimental results demonstrate a 92.3% detection rate, 5.4% false positive rate, and correction latency under 250 ms. Three simulated attack scenarios confirm the framework’s robustness and ability to sustain CPS performance under adversarial conditions. Future work will explore Field-Programmable Gate Array (FPGA) deployment for hardware validation and Digital Twin (DT) integration for realtime system mirroring and predictive defense.

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Publication Details

Published
2025-05-15
DOI
https://doi.org/10.1109/iraset64571.2025.11008059
Citations
1
Primary Topic
Smart Grid Security and Resilience
Type
article
Field-Weighted Citation Impact
1.21
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article

Real-Time Detection and Correction of Signal-Based Attacks in Cyber-Physical Systems

Ahmed Lakhssassi, Jamal Zbitou, Aziz Oukaira, Fathallah Khamlich et al.
1 citations
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article

Real-Time Detection and Correction of Signal-Based Attacks in Cyber-Physical Systems

Ahmed Lakhssassi, Jamal Zbitou, Aziz Oukaira, Fathallah Khamlich, Yassine Khamlich
article en
1 citations

Abstract

Cyber-Physical Systems (CPS) are vital to modern infrastructure but remain vulnerable to signal-based attacks that threaten their reliability and safety. This work proposes a practical security framework combining Verilog simulations and Python-based analysis to detect and correct False Data Injection (FDI) attacks in real time. The system integrates anomaly detection, classification, and, correction using predefined logic and Machine Learning (ML) inference. Experimental results demonstrate a 92.3% detection rate, 5.4% false positive rate, and correction latency under 250 ms. Three simulated attack scenarios confirm the framework’s robustness and ability to sustain CPS performance under adversarial conditions. Future work will explore Field-Programmable Gate Array (FPGA) deployment for hardware validation and Digital Twin (DT) integration for realtime system mirroring and predictive defense.

Université de Moncton (CA), Cégep de l'Outaouais (CA), University of Hassan II Casablanca (MA)
Openalex Percentile: Top 21%
Smart Grid Security and Resilience
1.21
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