Scaled Dual‐Gate Indium–Gallium–Zinc Oxide Thin‐Film Transistor for Two Transistor‐Zero‐Capacitor Dynamic Random Access Memory

Although indium–gallium–zinc oxide (IGZO) thin‐film transistor (TFT) has been widely commercialized in flat panel displays, its low leakage current and low thermal budget show promise in the application of next‐generation dynamic random‐access memory (DRAM). In this work, it is experimentally demonstrated that IGZO TFT can be scaled down to 30 nm based on an ultrathin channel, low equivalent oxide thickness, optimized contact, and connected dual‐gate (DG) design. Excellent electrical performance, with a high ON‐state current of 615 μA μm −1 and transconductance of 559 μS μm −1 at V DS = 1 V, and high immunity to short‐channel effects, with a low subthreshold swing of 63.4 mV dec −1 and drain‐induced barrier lowering of 10 mV V −1 , are achieved for DG IGZO TFT with L CH = 30 nm. Based on the optimized devices, DG IGZO two‐transistor‐zero‐capacitance DRAM exhibits 10‐ns write speed and 540‐s retention time, which is about 4 orders of magnitude longer than that of Si‐based DRAM. This study proves the high scalability of IGZO devices and their exceptional potential for high‐density back‐end‐of‐line integration in emerging DRAM technology.