Solving the Corner-Turn Problem With an Improved Radar Range-Doppler Detection Architecture

The corner-turn problem is a data-rate bottleneck encountered when a radar or sonar matched filter is implemented in a Field-Programmable Gate Array (FPGA). The data matrix between the range compression and the Doppler filtering stages is generally written in an external memory using burst memory accesses while it is later read using random memory accesses, known to be slower and causing the bottleneck. To solve this problem, we propose a low-cost software solution which consists in pre-detecting targets between the range compression step and the Doppler filtering step, such that the random memory accesses are limited where possible targets may occur instead of systematically reading the entire memory. However, the proposed solution is not recommended in the presence of clutter, and is therefore best suited for sparse environments such as radar for space rendezvous or detect-and-avoid in the upper atmosphere.