Modeling of FE Parasitic Inductance in BCD Power Switches
This paper proposes a calculation methodology for assessing the parasitic inductance within an IC package. As a case study, the BCD technology of one of the top IC suppliers was used. The results will be evaluated against FEM calculations in a well vetted commercial software.
Authors
- Ioan Purcar
- Cristian Boianceanu
- Ştefan Ardeleanu
Institutions
- Technical University of Cluj-Napoca (RO)
- Center of Technology and Engineering for Nuclear Projects (RO)
Publication Details
- Published
- 2025-04-06
- DOI
- https://doi.org/10.1109/eurosime65125.2025.11006573
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Bundesministerium für Klimaschutz, Umwelt, Energie, Mobilität, Innovation und Technologie
- Österreichische Forschungsförderungsgesellschaft