Efficient fault-tolerant circuit for preparing quantum uniform superposition states via quantum measurement

Abstract Preparing quantum superposition states is a crucial step in realizing quantum algorithms, which demands substantial resources. In this paper, we propose a new method for preparing quantum uniform superposition states via quantum measurement, and design the bitwise implementation circuit, which only contains Hadamard, CNOT, and π /8 phase gates. Compared to the Shukla–Vedula method, the number of quantum gates required by both methods scales the same, while, the new method offers stronger fault tolerance, and the ancillary qubits employed during the implementation process can be reused, making it more suitable for implementation on real quantum computers. As an application, we provide the circuit for Shor’s discrete logarithm quantum algorithm, based on the new method, demonstrating its technical advantage for implementation of quantum algorithms.