Substrate-Embedded SiC MOSFET Die Attach: A Molecular Dynamics Study on the Physical Properties of Sintered Cu

Substrate-embedded SiC MOSFETs offer significant advantages in electric vehicle power modules, including lower switching loss and faster switching speeds. However, thermal management remains a challenge under extreme operational conditions, necessitating die-attach materials with high thermal conductivity. Sintered Cu, with its superior thermal and electrical properties, shows promise, yet there is a lack of research on the sintering interface of Cu NPs. This study evaluates sintered Cu with different metallization layers by molecular dynamics simulations. Results show that Cu metallization layer exhibits superior bonding stability and a high shrinkage rate of 25.64 %. Au metallization layer demonstrates the greatest interdiffusion depth of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$19 \AA$</tex>. The elastic modulus ranges from 24.78 GPa to 73.41 GPa, increasing with sintering temperature and pressure. The rearrangement of Cu atom lattice near the sintering necks contributes to the increase in sintering strength during sintering. These findings demonstrate that metallization layers influence the properties of Cu NPs after sintering by influencing the coalescence and interdiffusion behaviors.