Hardware Aware Polyalphabetic Cipher Design Using Spin-Orbit Torque Controlled Spintronic Devices
This work presents a hardware-aware polyalphabetic cipher leveraging spin-orbit torque (SOT)-based spintronic devices. Utilizing the randomness and non-linear magnetization dynamics of spintronics, the design introduces hardware-driven entropy for enhanced encryption. Dynamic shift values and a hardware-based substitution box (S-box) achieve moderate non-linearity and uniform functionality. Experimental results validate the system’s robustness across temperature and device-to-device variations, demonstrating the potential of spintronics for lightweight, secure cryptographic applications.
Authors
- Divyanshu Divyanshu
- Selma Amara (ORCID: https://orcid.org/0000-0002-0131-1703)
- Camelia Florina Florica (ORCID: https://orcid.org/0009-0001-9983-9572)
- Gianluca Setti (ORCID: https://orcid.org/0000-0002-2496-1856)
- Aijaz H. Lone (ORCID: https://orcid.org/0000-0002-1687-2917)
- Meng Tang
Institutions
- King Abdullah University of Science and Technology (SA)
Publication Details
- Journal
- IEEE Transactions on Circuits & Systems II Express Briefs
- Published
- 2025-05-22
- DOI
- https://doi.org/10.1109/tcsii.2025.3572616
- Primary Topic
- Quantum-Dot Cellular Automata
- Type
- article
- Field-Weighted Citation Impact
- 0.00