A 140-GHz Low-Noise Amplifier in 45-nm RFSOI Based on a Joint-Noise-and-Gain-Optimized Embedding Network

This letter presents a D-band three-stage differential low-noise amplifier (LNA) design using a joint-noise-and-gain-optimized embedding network in GlobalFoundries’ 45-nm RFSOI process. The embedding network ensures that the amplifier at each stage is gain-boosted and designed for simultaneous noise and conjugate match while minimizing the loss of the input matching network, resulting in LNA with the highest peak gain, lowest noise figure (NF), and highest figure of merit (FoM) compared with other reported CMOS designs. The LNA has a peak gain of 30.75 dB at 138 GHz, a minimum NF of 4.25–5.32 dB, and an OP1 dB of −2.43 dBm at 138 GHz. The design consumes a dc power of 25 mW and occupies an active area of 0.13 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>.