Tunable Voltage Reference circuit in a standard 65nm CMOS technology
This paper presents tunable voltage reference (TVR) designed in a standard general purpose 65nm CMOS technology. Designed circuit is based on two-transistor (2T) voltage reference (VR) with digitally controlled operational amplifier (OPAMP). Developed TVR provides stable output voltage from 0.38 V to 1.1 V with non-linear tuning step under 0.5% of the output voltage (from 1.9 mV to 2.9 mV). The supply voltage in the range from 0.91 V to 1.5 V is used. The circuit offers parameter PSRR = -53.59 dB (at 1 kHz) and line regulation (LNR) of 0.35% in the worst case. The required area is 0.0185 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. The proposed TVR was used to precise frequency tuning of oscillator. Provided results are obtained from both simulations and measurement of the manufactured ASIC prototype.
Authors
- Róbert Ondica (ORCID: https://orcid.org/0009-0001-5469-9668)
- Viera Stopjaková (ORCID: https://orcid.org/0000-0002-0010-8965)
- Miroslav Potočný (ORCID: https://orcid.org/0009-0009-6366-123X)
- David Maljar (ORCID: https://orcid.org/0009-0006-5712-5033)
- Daniel Arbet (ORCID: https://orcid.org/0000-0001-9412-4503)
Institutions
- Slovak University of Technology in Bratislava (SK)
Publication Details
- Published
- 2025-05-05
- DOI
- https://doi.org/10.1109/ddecs63720.2025.11006809
- Citations
- 1
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.67
Funders
- Research and Development