Tunable Voltage Reference circuit in a standard 65nm CMOS technology

This paper presents tunable voltage reference (TVR) designed in a standard general purpose 65nm CMOS technology. Designed circuit is based on two-transistor (2T) voltage reference (VR) with digitally controlled operational amplifier (OPAMP). Developed TVR provides stable output voltage from 0.38 V to 1.1 V with non-linear tuning step under 0.5% of the output voltage (from 1.9 mV to 2.9 mV). The supply voltage in the range from 0.91 V to 1.5 V is used. The circuit offers parameter PSRR = -53.59 dB (at 1 kHz) and line regulation (LNR) of 0.35% in the worst case. The required area is 0.0185 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. The proposed TVR was used to precise frequency tuning of oscillator. Provided results are obtained from both simulations and measurement of the manufactured ASIC prototype.

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Publication Details

Published
2025-05-05
DOI
https://doi.org/10.1109/ddecs63720.2025.11006809
Citations
1
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
0.67

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article

Tunable Voltage Reference circuit in a standard 65nm CMOS technology

Róbert Ondica, Viera Stopjaková, Miroslav Potočný, David Maljar et al.
1 citations
Analog and Mixed-Signal Circuit Design
0.67
article

Tunable Voltage Reference circuit in a standard 65nm CMOS technology

Róbert Ondica, Viera Stopjaková, Miroslav Potočný, David Maljar, Daniel Arbet
article en
1 citations

Abstract

This paper presents tunable voltage reference (TVR) designed in a standard general purpose 65nm CMOS technology. Designed circuit is based on two-transistor (2T) voltage reference (VR) with digitally controlled operational amplifier (OPAMP). Developed TVR provides stable output voltage from 0.38 V to 1.1 V with non-linear tuning step under 0.5% of the output voltage (from 1.9 mV to 2.9 mV). The supply voltage in the range from 0.91 V to 1.5 V is used. The circuit offers parameter PSRR = -53.59 dB (at 1 kHz) and line regulation (LNR) of 0.35% in the worst case. The required area is 0.0185 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. The proposed TVR was used to precise frequency tuning of oscillator. Provided results are obtained from both simulations and measurement of the manufactured ASIC prototype.

Slovak University of Technology in Bratislava (SK)
Research and Development
Affordable and clean energy
Openalex Percentile: Top 31%
Analog and Mixed-Signal Circuit Design
0.67
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Tunable Voltage Reference circuit in a standard 65nm CMOS technology — Róbert Ondica, Viera Stopjaková, et al. · (2025) | TGRS Research Map | TGRS