A Bandgap Diode-Based Voltage Band Detection Circuit With Fast Response Time and Low Vmin on Intel 4 Logic Technology

A fast, accurate, single-rail voltage detection circuit (VDC) is presented. Low voltage operation is achieved by a variable gain Charge Pump (CP) followed by a Low-Dropout regulator (LDO). An Open-loop Band Gap Reference (BGREF), passed to a dynamic comparator, achieves an undervoltage trip point of 0.62V with 8.7mV sigma, and an overvoltage trip point of 1.22V with 12mV sigma, demonstrated on Intel 4 silicon prototype. The design operates without any filter cap, allowing a fast, power-on ramp of 2ls, and brown-out detection of <200ns. A voltage band detection of 0.48-1.22V is enabled through a finite-state machine (FSM) to modify CP and LDO gain depending on input voltage.

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Publication Details

Journal
IEEE Solid-State Circuits Letters
Published
2025-01-01
DOI
https://doi.org/10.1109/lssc.2025.3572385
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
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article

A Bandgap Diode-Based Voltage Band Detection Circuit With Fast Response Time and Low Vmin on Intel 4 Logic Technology

Jaydeep P. Kulkarni, Atresh Sanne, Mohammad M. Hasan, Stafford Hutchins et al.
3 links
IEEE Solid-State Circuits Letters
Analog and Mixed-Signal Circuit Design
article

A Bandgap Diode-Based Voltage Band Detection Circuit With Fast Response Time and Low Vmin on Intel 4 Logic Technology

Jaydeep P. Kulkarni, Atresh Sanne, Mohammad M. Hasan, Stafford Hutchins, Zhanping Chen, Kedar Bhatt
article en

Abstract

A fast, accurate, single-rail voltage detection circuit (VDC) is presented. Low voltage operation is achieved by a variable gain Charge Pump (CP) followed by a Low-Dropout regulator (LDO). An Open-loop Band Gap Reference (BGREF), passed to a dynamic comparator, achieves an undervoltage trip point of 0.62V with 8.7mV sigma, and an overvoltage trip point of 1.22V with 12mV sigma, demonstrated on Intel 4 silicon prototype. The design operates without any filter cap, allowing a fast, power-on ramp of 2ls, and brown-out detection of <200ns. A voltage band detection of 0.48-1.22V is enabled through a finite-state machine (FSM) to modify CP and LDO gain depending on input voltage.

IEEE Solid-State Circuits LettersVol. 8
Intel (United States) (US), The University of Texas at Austin (US)
Affordable and clean energy
Openalex Percentile: Top 90%
Analog and Mixed-Signal Circuit Design
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