Controllability-Based Circuit Similarity Estimation

Assessing the structural similarity of different implementations of logic functions is of importance in many areas of digital design, such as iterative resynthesis, engineering change order (ECO) based design, design of reliable redundant systems (duplex, TMR), etc. In general, numerous metrics exist that describe such similarity, mostly based on its intended application. In this paper, we introduce a novel metric based on a calculation of the functional equivalence of subcircuits. As this approach requires repeated calls of time-consuming functional equivalence checking, we propose a linear-time approximation of this method based on signal controllability calculation. These two approaches are compared to the state-of-the-art fault detection-based design diversity estimation technique and applied to assess the fault-security capabilities of duplex systems.

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Published
2025-05-05
DOI
https://doi.org/10.1109/ddecs63720.2025.11006818
Primary Topic
VLSI and Analog Circuit Testing
Type
article
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Controllability-Based Circuit Similarity Estimation

Petr Fišer
VLSI and Analog Circuit Testing
article

Controllability-Based Circuit Similarity Estimation

Petr Fišer
article en

Abstract

Assessing the structural similarity of different implementations of logic functions is of importance in many areas of digital design, such as iterative resynthesis, engineering change order (ECO) based design, design of reliable redundant systems (duplex, TMR), etc. In general, numerous metrics exist that describe such similarity, mostly based on its intended application. In this paper, we introduce a novel metric based on a calculation of the functional equivalence of subcircuits. As this approach requires repeated calls of time-consuming functional equivalence checking, we propose a linear-time approximation of this method based on signal controllability calculation. These two approaches are compared to the state-of-the-art fault detection-based design diversity estimation technique and applied to assess the fault-security capabilities of duplex systems.

Czech Technical University in Prague (CZ)
Openalex Percentile: Top 90%
VLSI and Analog Circuit Testing
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