Silicon-based, Dual-Polarized Aperture-Coupled mmWave On-Chip Antenna Arrays

We report V-band dual-polarized aperture-coupled on-chip antennas where the radiating patch is patterned on the Si substrate instead of the dielectric interconnect layers, eliminating the need for lossy thru-Si vias or wirebonds for interconnection. An asymmetric cross-shaped slot is employed to minimize coupling between the feeds for each polarization. The −10 dB impedance bandwidths for Port 1 (P<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</inf>) and Port 2 (P<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>) are 59.2–60.35 and 59.4–61.0 GHz, respectively. The realized gain of the patch antenna at P1 is 3.86 dBi with a directivity of 5.94 dBi, while P2 has a realized gain of 4.15 dBi and a directivity of 5.82 dBi at 60 GHz, indicating efficiencies of 62% and 68%, respectively. We have achieved maximum port-to-port coupling of −18.4 dBi for both polarizations. The proposed on-chip antennas and arrays offer the potential for monolithic integration with radio frequency (RF) circuitry for V-band system-on-chip (SoC) applications that demand high data throughput.

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Published
2025-03-30
DOI
https://doi.org/10.23919/eucap63536.2025.10999281
Primary Topic
Antenna Design and Analysis
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article
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article

Silicon-based, Dual-Polarized Aperture-Coupled mmWave On-Chip Antenna Arrays

Walter Disharoon, Seung Yoon Lee, Sree Adinarayana Dasari, Nima Ghalichechian et al.
Antenna Design and Analysis
article

Silicon-based, Dual-Polarized Aperture-Coupled mmWave On-Chip Antenna Arrays

Walter Disharoon, Seung Yoon Lee, Sree Adinarayana Dasari, Nima Ghalichechian, David L. West
article en

Abstract

We report V-band dual-polarized aperture-coupled on-chip antennas where the radiating patch is patterned on the Si substrate instead of the dielectric interconnect layers, eliminating the need for lossy thru-Si vias or wirebonds for interconnection. An asymmetric cross-shaped slot is employed to minimize coupling between the feeds for each polarization. The −10 dB impedance bandwidths for Port 1 (P<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</inf>) and Port 2 (P<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>) are 59.2–60.35 and 59.4–61.0 GHz, respectively. The realized gain of the patch antenna at P1 is 3.86 dBi with a directivity of 5.94 dBi, while P2 has a realized gain of 4.15 dBi and a directivity of 5.82 dBi at 60 GHz, indicating efficiencies of 62% and 68%, respectively. We have achieved maximum port-to-port coupling of −18.4 dBi for both polarizations. The proposed on-chip antennas and arrays offer the potential for monolithic integration with radio frequency (RF) circuitry for V-band system-on-chip (SoC) applications that demand high data throughput.

Georgia Institute of Technology (US)
Affordable and clean energy
Openalex Percentile: Top 85%
Antenna Design and Analysis
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Silicon-based, Dual-Polarized Aperture-Coupled mmWave On-Chip Antenna Arrays — Walter Disharoon, Seung Yoon Lee, et al. · (2025) | TGRS Research Map | TGRS