FPGA Implementation of a Real-Time Application Based on RISC-V Cores

This paper investigates the FPGA implementation of a real-time medical application using open-source RISC-V cores, focusing on the NOVA processor and the widely recognized VexRiscv processor. The study, conducted in collaboration with Siemens Healthineers and Friedrich-Alexander University Erlangen-Nuremberg (FAU), evaluates the performance and feasibility of these processors in a healthcare scenario under strict timing constraints. It focuses on their integration within the tube collimator board (TCO) of a computed tomography (CT) system. To ensure reliable operation, input data rates were down-sampled by a factor of four, enabling a robust design flow for integrating RISC-V cores into CT systems. Experimental results demonstrate that the NOVA processor, which employs a carry-free adder based on ternary data representation, achieves 1.65× higher computational power compared to VexRiscv. However, this performance improvement comes at the cost of increased FPGA resource utilization, whereas VexRiscv offers better resource efficiency with competitive performance. The findings underscore the versatility of RISC-V architectures in the current real-time medical application and highlight the potential of the ternary-coded data processing scheme for advancing practical solutions in medical electronics.

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Published
2025-02-17
DOI
https://doi.org/10.1109/ssd64182.2025.10989839
Primary Topic
Embedded Systems Design Techniques
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article
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article

FPGA Implementation of a Real-Time Application Based on RISC-V Cores

Farhad Ebrahimi-Azandaryani, Dietmar Fey, Amr Abdelhafez, Maurizio Bianconi
Embedded Systems Design Techniques
article

FPGA Implementation of a Real-Time Application Based on RISC-V Cores

Farhad Ebrahimi-Azandaryani, Dietmar Fey, Amr Abdelhafez, Maurizio Bianconi
article en

Abstract

This paper investigates the FPGA implementation of a real-time medical application using open-source RISC-V cores, focusing on the NOVA processor and the widely recognized VexRiscv processor. The study, conducted in collaboration with Siemens Healthineers and Friedrich-Alexander University Erlangen-Nuremberg (FAU), evaluates the performance and feasibility of these processors in a healthcare scenario under strict timing constraints. It focuses on their integration within the tube collimator board (TCO) of a computed tomography (CT) system. To ensure reliable operation, input data rates were down-sampled by a factor of four, enabling a robust design flow for integrating RISC-V cores into CT systems. Experimental results demonstrate that the NOVA processor, which employs a carry-free adder based on ternary data representation, achieves 1.65× higher computational power compared to VexRiscv. However, this performance improvement comes at the cost of increased FPGA resource utilization, whereas VexRiscv offers better resource efficiency with competitive performance. The findings underscore the versatility of RISC-V architectures in the current real-time medical application and highlight the potential of the ternary-coded data processing scheme for advancing practical solutions in medical electronics.

Friedrich-Alexander-Universität Erlangen-Nürnberg (DE), Siemens Healthineers (Germany) (DE)
Openalex Percentile: Top 91%
Embedded Systems Design Techniques
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FPGA Implementation of a Real-Time Application Based on RISC-V Cores — Farhad Ebrahimi-Azandaryani, Dietmar Fey, et al. · (2025) | TGRS Research Map | TGRS