A < 2dB Noise Figure X-band Core Chip in .15\mu \mathrm{m}$ GaN MMIC Technology for Phased Array Radars

This paper presents a common-leg topology-based core chip MMIC for X-band TR modules. The core chip handles beam steering and sidelobe level adjustment in active electronically steered array (AESA) radars. Designed in Wolfspeed <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.15\mu \mathrm{m}$</tex> GaN technology, the chip achieves a gain of 18-23dB with a noise figure below 2dB covering 8-12GHz frequency band. The chip features a digitally controlled 6-bit phase shifter, 6-bit digital step attenuator and voltage gain amplifiers to maintain signal levels. It shows an RMS phase error of 6° and RMS attenuation error below 1dB with compact area of 28 sq. mm.