DH-PIM: Maximizing Computing Unit Utilization in Digital PIM by Dual Half Mode Extension
Transformer-based Large Language Models (LLMs) rely on both General Matrix-Matrix Multiplication (GEMM) and General Matrix-Vector Multiplication (GEMV) for inference. While existing Processing-in-Memory (PIM) architectures, like HBM-PIM and Newton, efficiently handle GEMV operations, they suffer from low computing unit utilization during GEMM due to frequent input preparation and activation cycles. To address this, we propose Dual Half-mode PIM (DH-PIM), an extension of the Half Division Mode from previous PipePIM. DH-PIM splits sense amplifiers, and computing units into halves, allowing them to execute different operations independently. Dual half mode, which allows both halves of the computing unit to process data broadcast from either half of the sense amplifier, significantly enhances utilization via overlapped and pipelined execution. Our simulations show DH-PIM improves GEMM performance by up to 2.06x in GEMM kernels, with about 1.46x speedup in LLM tasks, compared to HBM-PIM. These performance improvements are achieved with minimal architectural modifications, resulting in low area and energy overhead.
Authors
- Taeyang Jeong (ORCID: https://orcid.org/0000-0001-9110-6502)
- Seok‐Min Yun (ORCID: https://orcid.org/0000-0003-2087-3661)
- Eui-Young Chung (ORCID: https://orcid.org/0000-0003-2013-8763)
- Byoung Jin Kim
Institutions
- Yonsei University (KR)
Publication Details
- Journal
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Published
- 2025-05-20
- DOI
- https://doi.org/10.1109/tcad.2025.3571857
- Citations
- 2
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 1.46