A Novel Hardware Approach to Image Encryption Using Chaotic Systems

This paper presents a novel chaotic pseudo-random number generator (PRNG) architecture that integrates the XoShiRo128++ algorithm with a chaotic logistic map, combined with an XOR operation using a Linear Feedback Shift Register (LFSR). The hybrid PRNG harnesses the high statistical quality of XoShiRo128++ and the sensitivity of chaotic systems to initial conditions, producing robust and unpredictable sequences. This generator is applied to image encryption using the XOR operation, and its performance and security are thoroughly evaluated. The hardware implementation is carried out on a Zybo Z7 board from the Zynq-7000 family, a resource-constrained FPGA platform. The performance analysis encompasses FPGA resource utilization, timing efficiency, and image-based metrics such as entropy and pixel correlation. The results demonstrate that the proposed chaotic PRNG provides a secure and efficient encryption system, making it highly suitable for resource-limited environments and promising for lightweight cryptographic applications.