Width-Induced Hump Effect and Electrical Stress Impact on N-Type Junctionless Gate-All-Around Transistors

Junctionless gate-all-around (JLGAA) transistors offer enhanced performance and scalability over conventional transistors. However, this study found that n-type JLGAA transistors made from amorphous silicon exhibit a hump effect in the drain voltage versus gate voltage characteristics when the channel width is small, and this effect can be exacerbated by electrical stress. To investigate this phenomenon, a comprehensive study was conducted, including electrical characterization, width narrowing effects, stress tests, and TCAD simulations. The pronounced hump effect was observed in devices with narrower channels and diminished under higher drain–source voltages. Electrical stress testing revealed that stress can induce or amplify the hump effect, particularly at higher stress levels and smaller device sizes. TCAD simulations suggest that uneven channel doping in JLGAA FETs is associated with localized dielectric stress, potentially linked to parasitic transistor effects.