Revisiting the CMOS Differential Pair With a Current–Mirror Load [CAS Education]

The derivation of gain and output resistance of a current-mirror loaded differential pair is a standard part of any analog circuits course. When the transistors have a finite incremental output resistance, analysis of the circuit becomes cumbersome as the current mirror ruins the network’s symmetry. To simplify the analysis, several reasonable assumptions—not often appreciated by novice students—are typically made. This article shows that symmetry and the concept of half-circuits can still be used to analyze a differential pair with a current-mirror load. The method significantly simplifies the algebra, while yielding exact results.