A Featureless Dual-Mode Latch-Based PUF

Most physical unclonable functions (PUFs) can be located by attackers and are vulnerable to various physical attacks due to their distinct image and circuit features. To address this vulnerability, this article proposes a featureless dual-mode latch-based (FDL) PUF that is concealed within the digital circuit. The FDL PUF is implemented using standard cells and a digital design flow. It is then randomly distributed among other standard digital cells within the chip to eliminate possible identification of image features. Moreover, the output key of the FDL PUF is randomly extracted, and the FDL PUF is then repurposed to store other intermediate variables of the security algorithm, effectively eliminating the circuit features. The proposed FDL PUF is integrated into a secure identity authentication chip fabricated using a standard 0.18-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>m CMOS process. The feasibility of locating the FDL PUF units is evaluated using computer vision technologies, specifically YOLOv10 combined with OpenCV. Test results demonstrate that the number of suspected latch-based PUF units is approximately 15 times higher than the actual number of FDL PUF units for the test security chip, highlighting the significant challenge faced by attackers when attempting to locate the FDL PUF.