Power Efficiency Improvement for Dual–Dielectric Resonator Oscillators

A dual–dielectric resonator oscillator (DDRO) was previously introduced as a promising configuration for wireless power transfer (WPT), achieving a wireless power level of 13.07 dBm with a DC‐to‐RF efficiency of 19.50%. This work presents the design, simulation, and implementation of a single‐port WPT system employing a parallel‐feedback DDRO for increasing the output power level. The design incorporates a 7.5‐GHz oscillator network featuring a class AB common‐source power amplifier transistor integrated with a dielectric resonator (DR)–based WPT. By utilizing a parallel‐feedback oscillator circuit, which enables efficient impedance matching through load‐pull analysis and eliminates the need for a lossy termination at the end of the feed line, and optimizing the coupling structure for the transmitter DR, the output power level and the DC‐to‐RF conversion efficiency have been significantly improved. The implemented circuit delivers a measured wireless power level of 14.83 dBm, showing an improvement of approximately 2 dB, with a DC‐to‐RF efficiency of 36.85% at 7.5 GHz, while maintaining a transmission bandwidth of 150 MHz. This capability facilitates simultaneous transmission of both power and data over a single channel. The paper also presents an accurate model for design purposes and demonstrates validity of the model using our measurement results.