Reduced on‐State Resistance of Hybrid‐Drain Gate Injection Transistors by Using Tapered Through Recess and Regrowth Gate Technology

A newly developed Tapered through recess and regrowth gate (Tapered TRRG) technology has been implemented into GaN‐based hybrid‐drain gate injection transistors (HD‐GITs). The photoresist for the gate recess etching is tapered by a classic photoresist reflow technique, followed by dry‐etching deep down to the GaN channel. A two‐dimensional electron gas (2DEG) is reconnected by “Regrowth barrier AlGaN”. By using this technology, on‐state resistance (R ds–on ) and saturation drain current (I ds–sat ) are drastically reduced and increased by ≈5.3% and ≈7.8%, respectively, compared to Conventional TRRG HD‐GITs. The divided series resistances under p‐GaN gate are calculated, and the resistance of the vertical sidewall region of gate recess ( R V ) is effectively reduced by 90% in Tapered TRRG. This shows that this technology could achieve equivalent R ds–on , compared to Conventional “non‐through‐gate‐recess” processes. Furthermore, R ds–on did not increase even at deeper gate recess down to 40 nm from the AlGaN/GaN interface, which expands the process margin and improves process stability significantly.