GaAs Growth on Ge‐Buffered Discontinuous (111)‐Faceted V‐Groove Silicon Substrates

Abstract The propagation of antiphase boundaries (APBs) and threading dislocations (TDs) poses a significant impediment to the realisation of high‐quality group III–V semiconductors grown on group IV platforms. The complete annihilation of APBs and a substantial reduction in threading dislocation density (TDD) are essential for achieving high‐efficiency III–V devices compatible with complementary metal‐oxide semiconductor (CMOS) technology. In this study, a novel growth technique is proposed and developed to fabricate a faceted germanium (Ge) buffer on a discontinuous (111)‐faceted V‐groove silicon (Si) substrate with a 500 nm flat ridge width. Subsequently, a GaAs buffer is grown on the Ge/V‐groove Si virtual substrate using a ramped temperature growth process to minimise the prevalence of line and planar defects in the buffer structure. An APB‐free GaAs buffer is successfully achieved, as confirmed by cross‐sectional and plan‐view transmission electron microscopy (TEM) and atomic force microscopy (AFM) analyses. The faceted Ge buffer layer obtained through this innovative approach alleviates the stringent fabrication requirements and intricate processing typically associated with conventional continuous V‐groove Si substrates. This advancement facilitates the development of photonic integrated circuits by providing a simplified and efficient alternative substrate solution.