A 0.13 µm CMOS V-band Cascode Low Noise Amplifier with Custom Transmission Line Inductors

This paper presents the design of a 60 GHz low noise amplifier (LNA) compliant with the IEEE 802.11ay network standards. The proposed LNA employs SilTerra 0.13 μm RF CMOS technology (April 2018 version) for its design and is developed based on the single-stage cascode topology. The performance of the design has been optimized using the source degeneration technique with gain-boosting and middle inductors. Due to the limitations of the process design kit (PDK), custom inductors have been developed for the LNA circuit. The inductors use ultra-thick metal (UTM) with a copper thickness of 3.3 µm. At 60 GHz, the proposed LNA has a simulated input reflection coefficient (S11) of -15.71 dB, reverse gain (S12) of -15.83 dB, forward gain (S21) of 7.25 dB, output reflection coefficient (S22) of -8.78 dB, noise figure (NF) of 6.79 dB and minimum noise figure (NFmin) of 6.55 dB. It is also unconditionally stable at 60 GHz with a simulated Rollett stability factor (K) of 1.27 and B1 stability factor of 0.79. The design shows high linearity, with a simulated input 1-dB compression point (P1dB) of -12.31 dBm and third order input intercept point (IIP3) of -3.09 dBm. The LNA has a 3-dB bandwidth of 9.3304 GHz, spanning from 55.35 GHz to 64.68 GHz. The power dissipation (PD) and supply voltage (VDD) of the LNA are 7.34 mW and 1.2 V, respectively.