Hardware implementation of real-time NLM algorithm

Recent years, Image Signal Processor (ISP) has been wildly used in our daily lives. Non-local means (NLM) is one of the most robust noise reduction algorithms, but its computational complexity makes it difficult to be used for the realtime processing. In this paper, we propose a hardware implementation of real-time NLM algorithm and discuss some details of the implementation. Eventually we synthesized and implemented it on an FPGA to analyze the resource utilization and the performance and draw some common conclusions.