Design of PCIe-based data transfer between FPGA and PC host computer

Aiming at the problem that it is not easy to transmit, observe and analyze the calculation results of FPGA-based simulation and test platform, a data transmission system between FPGA and PC based on PCIe is designed. The establishment of PCIe communication framework based on XDMA is carried out on the FPGA side, the driver of PC host computer side is installed, and the visualized communication system on the PC side is built by combining C++ and Qt platform. Tested under PCIE 2.0 standard, the average read/write speed is 2310.75MB/s, 3196.85MB/s respectively, and the average delay is within 763 micrometers, and the waveform of FPGA internal simulation model is successfully displayed in the upper computer, which indicates the stability and feasibility of the system.