An 8bit 1GS/s Time-Interleaved SAR ADC in 40nm CMOS

ADC is a circuit that converts analog signals to digital signals. With the rapid development of wireless communication, mobile communication, and the continuous breakthrough of the integrated circuit industry, ADC is required to have excellent data transmission efficiency and more stable data transmission quality which puts forward more stringent requirements for the fastest conversion speed and minimum conversion accuracy. An 8-bits 8-channels 1GS/S Timeinterleaved SAR ADC is designed in this paper under 40nm COMS process, which achieves a high sampling rate and high resolution. In this paper, by employing the bootstrap switch structure, VCM capacitor strategy, and time interleaving technology, multiple small and efficient single ADCs work in parallel, which significantly improves the sampling rate and work efficiency. The designed 8-channel time-interleaved SAR ADC has good performance at 1 GS/s sampling frequency, including high SNDR, SFDR, ENOB and low power consumption, which meets the application requirements in the field of high-speed and highprecision ADC.