A PMOS-Based Deep Cryogenic CMOS Temperature Sensor Achieving a Range from 10K to 410K with a Relative Inaccuracy of 0.5% (3σ)

Integrated circuit chips, such as controllers for superconducting quantum computing and readout circuits for infrared astronomical detectors, need to operate in the cryogenic temperature region of liquid nitrogen and even in the deep cryogenic temperature region of liquid helium. However, as shown in Fig. 1 (top left), as the number of transistors increases, the power consumption of the chip increases and some overheated areas in the chip may cause it to fail. Therefore, there is a strong requirement for on-chip deep cryogenic CMOS temperature sensors for temperature monitoring. In Fig. 1 (bottom), CMOS temperature sensors are mainly categorized as BJT-based, resistor-based, and MOS-based. Unfortunately, in BJT-based sensors, the CTAT characteristics of V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BE</inf> and the PTAT characteristics of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \mathrm{V}_{\text{BE}}$</tex> lose linearity below approximately 60K [1]. In resistor-based sensors, the NWELL resistors exhibit high non-linearity in the whole temperature range while the unsilicided P-Poly resistors and other kinds of resistors perform resistance saturation below approximately 60K [2]. In MOS-based sensors, the threshold voltage of NMOS transistors exhibits saturation below approximately 50K [2]–[4]. Therefore, none of the above sensors can be used for temperature sensing at deep cryogenic temperatures. Fig. 1 (top right) shows the different characteristics of PMOS threshold voltage in different temperature ranges. Above the critical temperature <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{T}_{\mathrm{C}}$</tex>, the threshold voltage of the PMOS transistor shows a linear temperature dependence due to Fermi potential based on the theory of semiconductor device physics. Below <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{T}_{\mathrm{C}}$</tex>, as the temperature decreases, some experimental results have observed that the PMOS threshold voltage presents higher temperature sensitivity at deep cryogenic temperatures [3], [4]. Currently, the mechanism behind this phenomenon has not been clearly explained. One study models this phenomenon to the change in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{C}_{0\mathrm{X}}$</tex> with temperature, and proposes a temperature function of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{C}_{0\mathrm{X}}$</tex> that agrees with the experimental results [3]. Another study interprets that as the temperature decreases, the interface-trap charge density near the band edge follows an exponential increase, leading to the higher temperature sensitivity [4]. The sensitive relationship between threshold voltage and temperature is related to the process. Some results indicate that threshold voltage in advanced processes is not suitable for temperature sensing [4]. However, according to our experimental data, the threshold voltage in 0.18um and 0.13um processes exhibits excellent temperature sensing characteristics. Considering the good linearity of PMOS transistors using 0.13um process in the high-temperature region and the high sensitivity in the low-temperature region, in this paper, we design a deep cryogenic CMOS temperature sensor based on a PMOS transistor, with an operating range from 10K (-263°C) to 410K (137°C) and a relative inaccuracy of 0.5%) (3σ).